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  • ASM Disassemble ?

    Hi guys

    In the NES/SNES

    LDA (LoaD Accumulator)

    Affects Flags: S Z
    MODE SYNTAX HEX LEN TIM

    Immediate LDA #$44 $A9 2 2

    Zero Page LDA $44 $A5 2 3

    Zero Page,X LDA $44,X $B5 2 4

    Absolute LDA $4400 $AD 3 4

    Absolute,X LDA $4400,X $BD 3 4+

    Absolute,Y LDA $4400,Y $B9 3 4+

    Indirect,X LDA ($44,X) $A1 2 6

    Indirect,Y LDA ($44),Y $B1 2 5+


    How is about PS1 ?


    Best regards
    Last edited by MasterGrand; 05-13-2016, 01:00:49 AM.
    Let's be together !!

  • #2
    What?

    If you're asking what I think you're asking, the PS1 doesn't really do multiple addressing modes for a single operation. Some assemblers and disassemblers might have additional mnemonics that can be used as a shortcut, but in general you use different operations, and the only addressing modes explicitly handled for loads are Immediate and Indexed.

    Let register $v0 stand for accumulator A and $a0 for the index register.
    • Immediate
      • ADDI $v0, zero, 0x44
      • ADDIU $v0, zero, 0x44
      • ORI $v0, zero, 0x44
      • And on and on.
    • Indexed. Generally requires at least two operations: one (or more) to establish an address, and another to load the value to a register.
      • LUI $a0, 0x8011
        LW $v0, 0x14($a0)
      • LW could be LB, LH, LHU, LBU, etc.
      • The base address could be loaded in any number of ways. The above is just the shortest.
      • You could sort of make a case that loading from say, 0($a0) is an approximation of absolute, but the processor will do the same work as if the index was 4, 9000, or 20.


    There's no analogous page concept on the PS1 or PS2. The only operations I can recall where something like that is a concern are the unconditional branches (J and JAL), where the upper bits of the destination are determined by the operation's address, so it can only jump within a 26-bit window or thereabouts. If you want to go beyond that, you have to use the JR and JALR operations.

    Edit: There are also no condition code registers on R3000 (PS1) or R5900 (PS2). So with regard to the condition flags LDA sets, you'd just have to use BEQ (branch equal) or BLT (branch less than) with the Zero register to check those statuses.
    Last edited by Pyriel; 05-13-2016, 11:38:32 PM.

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    • #3
      Thanks Pyriel, Last question ?

      In the NES/SNES

      Use type A9,A5,AD...etc

      What about PS1 use type ?
      Last edited by MasterGrand; 05-13-2016, 01:19:43 PM.
      Let's be together !!

      Comment


      • #4
        "Use type"?

        It looks like you're asking about the machine code, which is the mnemonics encoded in binary. That's going to vary from instruction to instruction. The PS1 and 2 are 32-bit RISC with each operation as 32 bits, containing all the information required to carry it out. The processor never has a need to do anything but fetch the next 32-bits from memory as it processes instructions. By contrast the NES would read a byte, and the value that has will determine how the next bytes should be used. Like I said, there are no encoded addressing modes on the PS, at least in the general purpose operations. I won't try to speak for all the coprocessors without taking a refresher. Including the addressing mode is why the LDA operation has about 8 different machine-code values on the NES, and it's why LDA can require 16 or 24 bits.

        So for the PS1, when you have, "ADDIU $v0, zero, 0x44", the machine code is 0x24020044. The last 16-bits (0x0044) is the immediate value. Of the first 16-bits (2402), the 6 most significant bits represent the operation (ADDIU, binary 001001), the next 5 bits are the source register (Zero, binary 00000), and the last 5 are the destination register ($v0, binary 00010). For the ORI version, the machine code is 0x34020044.

        Different instructions have different formats on the PS, using as much or as little of the available 32-bits as they need. For example, several of the register only instructions have binary 000000 where the operation was above, and use the least significant bits to encode the actual operation, since they don't need an immediate value. So "ADDU $v0, $v0, $v1" would be 6 bits of zeroes, followed by 5 bits each for the source, addend, and destination registers, then 5 unused bits, followed at last by 6 bits (100001) that indicate the ADDU operation.

        It's actually fairly messy. I still have some of the common stuff memorized, but for the most part, you're always better off using an assembler or some other tool, like PS2Dis, or CronoTrigga's thing to get the op code values. Even when I know what all the fields are, it's still much easier to use a tool to ensure it comes out right.

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        • #5
          Originally posted by Pyriel View Post
          "Use type"?

          It looks like you're asking about the machine code, which is the mnemonics encoded in binary. That's going to vary from instruction to instruction. The PS1 and 2 are 32-bit RISC with each operation as 32 bits, containing all the information required to carry it out. The processor never has a need to do anything but fetch the next 32-bits from memory as it processes instructions. By contrast the NES would read a byte, and the value that has will determine how the next bytes should be used. Like I said, there are no encoded addressing modes on the PS, at least in the general purpose operations. I won't try to speak for all the coprocessors without taking a refresher. Including the addressing mode is why the LDA operation has about 8 different machine-code values on the NES, and it's why LDA can require 16 or 24 bits.

          So for the PS1, when you have, "ADDIU $v0, zero, 0x44", the machine code is 0x24020044. The last 16-bits (0x0044) is the immediate value. Of the first 16-bits (2402), the 6 most significant bits represent the operation (ADDIU, binary 001001), the next 5 bits are the source register (Zero, binary 00000), and the last 5 are the destination register ($v0, binary 00010). For the ORI version, the machine code is 0x34020044.

          Different instructions have different formats on the PS, using as much or as little of the available 32-bits as they need. For example, several of the register only instructions have binary 000000 where the operation was above, and use the least significant bits to encode the actual operation, since they don't need an immediate value. So "ADDU $v0, $v0, $v1" would be 6 bits of zeroes, followed by 5 bits each for the source, addend, and destination registers, then 5 unused bits, followed at last by 6 bits (100001) that indicate the ADDU operation.

          It's actually fairly messy. I still have some of the common stuff memorized, but for the most part, you're always better off using an assembler or some other tool, like PS2Dis, or CronoTrigga's thing to get the op code values. Even when I know what all the fields are, it's still much easier to use a tool to ensure it comes out right.
          I understood now, Thanks Pyirel
          Let's be together !!

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