I can't find my pen drive that I usually just have wherever I go to mess with code if I'm at a computer. I'm just making this post a random little sandbox thing. I doubt it would help much people. I'm making this as if I'm jumping from the "jr ra" in the "scesifsendcmd" function of a game. I'm just editing and modifying this as I go when I get time.
Added "j" operations and some other load/store operations.
01-01-11: Completely rewrote some things in some kind of way that just makes life easier. Should work correctly for any instances of these 3:
"JR ??
Load/Store Op"
"J $0???????
Load/Store Op"
"JAL $0???????
Load/Store Op"
01-04-11: It should now work correctly for any instances of these 17:
"JALR ?? ??
Load/Store Op"
"BEQ ??, ??, $0???????
Load/Store Op"
"BNE ??, ??, $0???????
Load/Store Op"
"BLTZ ??, $0???????
Load/Store Op"
"BGTZ ??, $0???????
Load/Store Op"
"BLEZ ??, $0???????
Load/Store Op"
"BGEZ ??, $0???????
Load/Store Op"
"BEQL ??, ??, $0???????
Load/Store Op"
"BNEL ??, ??, $0???????
Load/Store Op"
"BLTZL ??, $0???????
Load/Store Op"
"BGTZL ??, $0???????
Load/Store Op"
"BLEZL ??, $0???????
Load/Store Op"
"BGEZL ??, $0???????
Load/Store Op"
"BLTZAL ??, $0???????
Load/Store Op"
"BGEZAL ??, $0???????
Load/Store Op"
"BLTZALL ??, $0???????
Load/Store Op"
"BGEZALL ??, $0???????
Load/Store Op"
That's all of the branches and jumps that would interfere with this and make it harder due to those delay slots or whatever they are called since I'm creating jumps. I just need to make it find single and multiple consecutive instances of Store/Load Ops, and check after them for the branches and jumps, and check after those for any other Store/Load Ops.
1-25-11: Added some stuff I started on for checking the next addresses' code for branches, jumps, other load/store operations, or just nothing.
2-18-11: More heavy updating to fix whatever stuff was wrong, incomplete, or not working the way I want it to. Changed many JALs to BGEZALs. I'm about to the point where I'm going to make it correctly check results that deal with doubles or vectors.
// Scan for Load or Store Ops & create watch points for them.
Address: 000FF000
_Init:
addiu sp, sp, $FF90
sq ra, $0000(sp)
sq s0, $0010(sp)
sq s1, $0020(sp)
sq s2, $0030(sp)
sq s3, $0040(sp)
sq s4, $0050(sp)
sq s5, $0060(sp)
lui s0, $0??? // Start Scanning Here
//ori s0, s0, $????
lui s1, $0??? // Stop Scanning Here
//ori s1, s1, $????
lui s2, $0??? // Start Making Subroutines Here
//ori s2, s2, $????
lui s3, $0??? // Stop Making Subroutines Here
//ori s3, s3, $????
lui s4, $0??? // Address You Want To Find
ori s4, s4, $????
//----------------
_Init_Find_Store_Or_Load_Ops: // This just finds a starting point.
lw t1, $0000(s0) // Load code at address.
lui t0, $FC00 // Shortcut value for checking bits 1-6.
and t2, t0, t1
daddu s5, zero, zero // Will be used to determine whether you need to check the next 1 or 3 addresses. 1 = 2 addresses, 2 = 4 addresses.
lui t3, $8000
beq t2, t3, :_Check_Previous_Op // Is it LB?
lui t3, $9000
beq t2, t3, :_Check_Previous_Op // Is it LBU?
lui t3, $A000
beq t2, t3, :_Check_Previous_Op // Is it SB?
lui t3, $8400
beq t2, t3, :_Check_Previous_Op // Is it LH?
lui t3, $9400
beq t2, t3, :_Check_Previous_Op // Is it LHU?
lui t3, $A400
beq t2, t3, :_Check_Previous_Op // Is it SH?
lui t3, $8C00
beq t2, t3, :_Check_Previous_Op // Is it LW?
lui t3, $9C00
beq t2, t3, :_Check_Previous_Op // Is it LWU?
lui t3, $AC00
beq t2, t3, :_Check_Previous_Op // Is it SW?
lui t3, $C400
beq t2, t3, :_Check_Previous_Op // Is it LWC1?
lui t3, $E400
beq t2, t3, :_Check_Previous_Op // Is it SWC1?
lui t3, $C800
beq t2, t3, :_Check_Previous_Op // Is it LWC2?
lui t3, $E800
beq t2, t3, :_Check_Previous_Op // Is it SWC2?
ori s5, zero, $0001
lui t3, $DC00
beq t2, t3, :_Check_Previous_Op // Is it LD?
lui t3, $FC00
beq t2, t3, :_Check_Previous_Op // Is it SD?
lui t3, $6800
beq t2, t3, :_Check_Previous_Op // Is it LDL?
lui t3, $B000
beq t2, t3, :_Check_Previous_Op // Is it SDL?
lui t3, $6C00
beq t2, t3, :_Check_Previous_Op // Is it LDR?
lui t3, $B400
beq t2, t3, :_Check_Previous_Op // Is it SDR?
lui t3, $D400
beq t2, t3, :_Check_Previous_Op // Is it LDC1?
lui t3, $F400
beq t2, t3, :_Check_Previous_Op // Is it SDC1?
ori s5, zero, $0002
lui t3, $7800
beq t2, t3, :_Check_Previous_Op // Is it LQ?
lui t3, $7C00
beq t2, t3, :_Check_Previous_Op // Is it SQ?
lui t3, $D800
beq t2, t3, :_Check_Previous_Op // Is it LQC2?
lui t3, $F800
beq t2, t3, :_Check_Previous_Op // Is it SQC2?
nop
addiu s0, s0, $0004
beq s0, s1, :_Finished_Scanning
nop
beq zero, zero, FFC4 // It's none, so check next address.
nop
//----------------
_Check_Previous_Op:
addiu s0, s0, $FFFC
lw t1, $0000(s0) // Load previous op.
lui t0, $FC1F
ori t0, t0, $FFFF
and t2, t0, t1
ori t3, zero, $0008
beq t2, t3, :_Found_Previous_JR
lui t0, $FC00
and t2, t0, t1
lui t3, $0800
beq t2, t3, :_Found_Previous_J
lui t3, $0C00
beq t2, t3, :_Found_Previous_JAL
lui t3, $1000
beq t2, t3, :_Found_Previous_BranchNormal // BEQ
lui t3, $1400
beq t2, t3, :_Found_Previous_BranchNormal // BNE
lui t3, $5000
beq t2, t3, :_Found_Previous_BranchLikely // BEQL
lui t3, $5400
beq t2, t3, :_Found_Previous_BranchLikely // BNEL
lui t0, $FC1F
and t2, t0, t1
lui t3, $0400
beq t2, t3, :_Found_Previous_BranchNormal // BLTZ
lui t3, $0401
beq t2, t3, :_Found_Previous_BranchNormal // BGEZ
lui t3, $0402
beq t2, t3, :_Found_Previous_BranchLikely // BLTZL
lui t3, $0403
beq t2, t3, :_Found_Previous_BranchLikely // BGEZL
lui t3, $0410
beq t2, t3, :_Found_Previous_BranchAndLink // BLTZAL
lui t3, $0411
beq t2, t3, :_Found_Previous_BranchAndLink // BGEZAL
lui t3, $0412
beq t2, t3, :_Found_Previous_BranchAndLinkLikely // BLTZALL
lui t3, $0413
beq t2, t3, :_Found_Previous_BranchAndLinkLikely // BGEZALL
lui t3, $1800
beq t2, t3, :_Found_Previous_BranchNormal // BLEZ
lui t3, $1900
beq t2, t3, :_Found_Previous_BranchNormal // BGTZ
lui t3, $5800
beq t2, t3, :_Found_Previous_BranchLikely // BLEZL
lui t3, $5900
beq t2, t3, :_Found_Previous_BranchLikely // BGTZL
lui t0, $FC1F
ori t0, t0, $0EFF
and t2, t0, t1
ori t3, zero, $0009
beq t2, t3, :_Found_Previous_JALR
lui t0, $FFFF
and t2, t0, t1
lui t3, $4500
beq t2, t3, :_Found_Previous_BranchNormal // BC1F
lui t3, $4501
beq t2, t3, :_Found_Previous_BranchLikely // BC1FL
lui t3, $4502
beq t2, t3, :_Found_Previous_BranchNormal // BC1T
lui t3, $4503
beq t2, t3, :_Found_Previous_BranchLikely // BC1TL
nop
beq zero, zero, :_Check_Next_Op
addiu s0, s0, $0004
//----------------
_Found_Previous_JR:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0048 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
addiu s2, s2, $0004
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bne s5, zero, $ ///////
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_jr_Original
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_J:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0048 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t2_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_j_OriginalAddress
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//----------------
_Found_Previous_bgezal zero,:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0050 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_lui_ra_OriginalAddress
nop
bgezal zero, :_convert_jal_to_j_OriginalAddress
nop
bgezal zero, :_ori_ra_ra_OriginalAddress
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//----------------
_Found_Previous_JALR:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0060 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_rd_0aaa
nop
bgezal zero, :_ori_rd_rd_aaaa
nop
bgezal zero, :_srl_t1_rs_2
nop
bgezal zero, :_lui_r2_0800
nop
bgezal zero, :_or_r1_r1_r2
nop
bgezal zero, :_sw_r1_0054(r0)
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchNormal:
// This covers BEQ, BNE, BGTZ, BLTZ, BGEZ, BLEZ, BC1F, and BC1T.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0058 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_branch_t1_t3_0003
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchLikely:
// This covers BEQL, BNEL, BGTZL, BLTZL, BGEZL, BLEZL, BC1TL, and BC1FL.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0058 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_branch_u0_u1_0003
nop
bgezal zero, :_Original_Load_Or_Store_Op
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchAndLink:
// This covers BLTZAL and BGEZAL.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $005C // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Remove_Linking_From_Branches
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
sw zero, $0004(s0)
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchAndLinkLikely:
// This covers BLTZALL and BGEZALL.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0058 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_Remove_Linking_From_Branches
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Check_If_There_Is_Enough_Space:
addu t0, t0, s2
slt t0, t0, s3
beq t0, zero, :_Finished_Scanning // If there's no room left to create subroutines, it's done.
nop
jr ra
nop
//---------------
_addiu_sp_sp_FFC0:
lui t0, $27BD
ori t0, t0, $FFC0
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sq_t0_0000(sp):
lui t0, $7FA8
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_t0_SubroutineArea:
lui t0, $3c08
srl t2, s2, 16
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_t0_t0_SubroutineArea:
lui t0, $3508
andi t1, s2, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sq_t1_0010(sp):
lui t0, $7FA9
ori t0, t0, $0010
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_t1_TargetAddress:
lui t0, $3c09
srl t2, s4, 16
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_t1_t1_TargetAddress:
lui t0, $3529
andi t1, s4, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sq_t2_0020(sp):
lui t0, $7FAA
ori t0, t0, $0020
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_is_t2_needed:
// If it encounters registers t0, t1, t2, or t3 being used, this will be used to move their contents to t2.
lw t0, $0004(s0)
srl t0, t0, 21
andi t0, t0, $001F
lui t3, $7BAA
ori t1, zero, $0008
beq t0, t1, $000C
ori t2, t3, $0000 // Load t0's contents into t2
ori t1, zero, $0009
beq t0, t1, $0009
ori t2, t3, $0010 // Load t1's contents into t2
ori t1, zero, $000A
beq t0, t1, $0006
ori t2, t3, $0020 // Load t2's contents into t2
ori t1, zero, $000B
beq t0, t1, $0003
ori t2, t3, $0030 // Load t3's contents into t2
jr ra
nop
sw t2, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_addiu_t3_NormallyUsedRegister_offset:
lui t0, $240B
lw t1, $0000(s0)
lui t2, $03E0
and t3, t1, t2
lui t4, $0100
bne t3, t4, $0005
lui t4, $0120
bne t3, t4, $0003
lui t4, $0160
beql t3, t4, $0001
lui t3, $0140
and t0, t0, t3
andi t2, t1, $FFFF
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_branch_u0_u1_0003:
lw t0, $0000(s0)
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_Original_Load_Or_Store_Op:
lw t0, $0004(s0)
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_beql_t1_r0_0001:
lui t0, $5120
ori t0, t0, $0001
lw t1, $0000(s0)
lui t2, $03E0
and t3, t1, t2
lui t4, $0100
bne t3, t4, $0005
lui t4, $0120
bne t3, t4, $0003
lui t4, $0160
beql t3, t4, $0001
lui t3, $0140
srl t3, t3, 5
or t0, t0, t3
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sw_t1_0000(t0):
lui t0, $AD09
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t0_0000(sp):
lui t0, $7BA8
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t1_0010(sp):
lui t0, $7BA9
ori t0, t0, $0010
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t2_0020(sp):
lui t0, $7BAA
ori t0, t0, $0020
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t3_0030(sp):
lui t0, $7BAB
ori t0, t0, $0030
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_addiu_sp_sp_0040:
lui t0, $27BD
ori t0, t0, $0040
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_jr_OriginalRegister:
lw t0, $0000(s0)
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_j_OriginalAddress:
lui t0, $0800
srl t2, s0, 2
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_ra_OriginalAddress:
lui t0, $3c1f
addiu t1, s0, $0008
srl t1, t1, 16
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_convert_jal_to_j_OriginalAddress:
lw t0, $0000(s0)
lui t1, $08FF
ori t1, t1, $FFFF
and t0, t0, t1 // Changes the JAL to a J.
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_ra_ra_OriginalAddress:
lui t0, $37FF
addiu t1, s0, $0008
andi t1, t1, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_rd_0aaa:
lw t0, $0000(s0)
srl t0, t0, 21
andi t0, t0, $001F
beql t0, zero, 0001
ori t0, t0, $001F
sll t0, t0, 16
lui t1, $3C00
or t0, t0, t1
addiu t1, s0, $0008
srl t1, t1, 16
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_rd_rd_aaaa:
lw t0, $0000(s0)
srl t0, t0, 21
andi t0, t0, $001F
beql t0, zero, 0001
ori t0, t0, $001F
sll t0, t0, 16
sll t1, t0, 5
or t0, t0, t1
lui t1, $3400
or t0, t0, t1
addiu t1, s0, $0008
andi t1, t1, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_srl_t1_rs_2:
ori t0, zero, $4882
lw t1, $0000(s0)
andi t1, t1, $F800
sll t1, t1, 5
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_r2_0800:
lui t0, $3C0A
ori t0, t0, $0800
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_or_t1_t1_t2:
lui t0, $012A
ori t0, t0, $4825
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sw_t1_0054(t0):
lui t0, $AD09
ori t0, t0, $0054
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_branch_t1_t3_0003:
lw t0, $0000(s0)
srl t0, t0, 26
sll t0, t0, 26
ori t0, t0, $0003
lui t1, $012b
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_j_destination1:
addiu t0, s0, $0008
srl t0, t0, 2
lui t1, $0800
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_j_destination2:
srl t0, s0, 2
addiu t0, t0, $0001
lw t1, $0000(s0)
andi t1, t1, $FFFF
addiu t0, t0, t1
lw t1, $0800
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_Remove_Linking_From_Branches:
lui t1, $FFEF
ori t1, t1, $FFFF
and t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_Create_Jump_To_Subroutine:
lui t0, $0800
srl t2, s2, 2
addiu t2, t2, $0001
or t0, t0, t2
jr ra
sw t0, $0000(s0)
//----------------
_Finished_Scanning:
lq ra, $0000(sp)
lq s0, $0010(sp)
lq s1, $0020(sp)
lq s2, $0030(sp)
lq s3, $0040(sp)
lq s4, $0050(sp)
lq s5, $0060(sp)
jr ra
addiu sp, sp, $0070
/*
lb = 80000000
lbu = 90000000
sb = a0000000
lh = 84000000
lhu = 94000000
sh = a4000000
lw = 8c000000
lwu = 9c000000
sw = ac000000
lwc1 = c4000000
swc1 = e4000000
lwc2 = c8000000
swc2 = e8000000
ld = dc000000
sd = fc000000
ldl = 68000000
sdl = b0000000
ldr = 6c000000
sdr = b4000000
ldc1 = d4000000
sdc1 = f4000000
lq = 78000000
sq = 7c000000
lqc2 = d8000000
sqc2 = f8000000
There's still a few more like these, like "prefetch" and "cache", but I'm not certain they are useful. I'll also need to alter this for doubles and quads since they have the possibility of missing addresses since they can use the next 12 bytes.
*/
/*
1 JR 000000 ????? 000000000000000 001000
1 JALR 000000 rs??? 00000 rd??? 00000 001001
1 BLTZ 000001 ????? 00000
1 BGEZ 000001 ????? 00001
1 BLTZL 000001 ????? 00010
1 BGEZL 000001 ????? 00011
1 BLTZAL 000001 ????? 10000
1 BGEZAL 000001 ????? 10001
1 BLTZALL 000001 ????? 10010
1 BGEZALL 000001 ????? 10011
1 BLEZ 000110 ????? 00000
1 BGTZ 000111 ????? 00000
1 BLEZL 010110 ????? 00000
1 BGTZL 010111 ????? 00000
1 J 000010
1 JAL 000011
1 BEQ 000100
1 BNE 000101
1 BEQL 010100
1 BNEL 010101
1 BC1F 010001 01000 00000
1 BC1T 010001 01000 00001
1 BC1FL 010001 01000 00010
1 BC1TL 010001 01000 00011
*/
Address: 000FF000
_Init:
addiu sp, sp, $FF90
sq ra, $0000(sp)
sq s0, $0010(sp)
sq s1, $0020(sp)
sq s2, $0030(sp)
sq s3, $0040(sp)
sq s4, $0050(sp)
sq s5, $0060(sp)
lui s0, $0??? // Start Scanning Here
//ori s0, s0, $????
lui s1, $0??? // Stop Scanning Here
//ori s1, s1, $????
lui s2, $0??? // Start Making Subroutines Here
//ori s2, s2, $????
lui s3, $0??? // Stop Making Subroutines Here
//ori s3, s3, $????
lui s4, $0??? // Address You Want To Find
ori s4, s4, $????
//----------------
_Init_Find_Store_Or_Load_Ops: // This just finds a starting point.
lw t1, $0000(s0) // Load code at address.
lui t0, $FC00 // Shortcut value for checking bits 1-6.
and t2, t0, t1
daddu s5, zero, zero // Will be used to determine whether you need to check the next 1 or 3 addresses. 1 = 2 addresses, 2 = 4 addresses.
lui t3, $8000
beq t2, t3, :_Check_Previous_Op // Is it LB?
lui t3, $9000
beq t2, t3, :_Check_Previous_Op // Is it LBU?
lui t3, $A000
beq t2, t3, :_Check_Previous_Op // Is it SB?
lui t3, $8400
beq t2, t3, :_Check_Previous_Op // Is it LH?
lui t3, $9400
beq t2, t3, :_Check_Previous_Op // Is it LHU?
lui t3, $A400
beq t2, t3, :_Check_Previous_Op // Is it SH?
lui t3, $8C00
beq t2, t3, :_Check_Previous_Op // Is it LW?
lui t3, $9C00
beq t2, t3, :_Check_Previous_Op // Is it LWU?
lui t3, $AC00
beq t2, t3, :_Check_Previous_Op // Is it SW?
lui t3, $C400
beq t2, t3, :_Check_Previous_Op // Is it LWC1?
lui t3, $E400
beq t2, t3, :_Check_Previous_Op // Is it SWC1?
lui t3, $C800
beq t2, t3, :_Check_Previous_Op // Is it LWC2?
lui t3, $E800
beq t2, t3, :_Check_Previous_Op // Is it SWC2?
ori s5, zero, $0001
lui t3, $DC00
beq t2, t3, :_Check_Previous_Op // Is it LD?
lui t3, $FC00
beq t2, t3, :_Check_Previous_Op // Is it SD?
lui t3, $6800
beq t2, t3, :_Check_Previous_Op // Is it LDL?
lui t3, $B000
beq t2, t3, :_Check_Previous_Op // Is it SDL?
lui t3, $6C00
beq t2, t3, :_Check_Previous_Op // Is it LDR?
lui t3, $B400
beq t2, t3, :_Check_Previous_Op // Is it SDR?
lui t3, $D400
beq t2, t3, :_Check_Previous_Op // Is it LDC1?
lui t3, $F400
beq t2, t3, :_Check_Previous_Op // Is it SDC1?
ori s5, zero, $0002
lui t3, $7800
beq t2, t3, :_Check_Previous_Op // Is it LQ?
lui t3, $7C00
beq t2, t3, :_Check_Previous_Op // Is it SQ?
lui t3, $D800
beq t2, t3, :_Check_Previous_Op // Is it LQC2?
lui t3, $F800
beq t2, t3, :_Check_Previous_Op // Is it SQC2?
nop
addiu s0, s0, $0004
beq s0, s1, :_Finished_Scanning
nop
beq zero, zero, FFC4 // It's none, so check next address.
nop
//----------------
_Check_Previous_Op:
addiu s0, s0, $FFFC
lw t1, $0000(s0) // Load previous op.
lui t0, $FC1F
ori t0, t0, $FFFF
and t2, t0, t1
ori t3, zero, $0008
beq t2, t3, :_Found_Previous_JR
lui t0, $FC00
and t2, t0, t1
lui t3, $0800
beq t2, t3, :_Found_Previous_J
lui t3, $0C00
beq t2, t3, :_Found_Previous_JAL
lui t3, $1000
beq t2, t3, :_Found_Previous_BranchNormal // BEQ
lui t3, $1400
beq t2, t3, :_Found_Previous_BranchNormal // BNE
lui t3, $5000
beq t2, t3, :_Found_Previous_BranchLikely // BEQL
lui t3, $5400
beq t2, t3, :_Found_Previous_BranchLikely // BNEL
lui t0, $FC1F
and t2, t0, t1
lui t3, $0400
beq t2, t3, :_Found_Previous_BranchNormal // BLTZ
lui t3, $0401
beq t2, t3, :_Found_Previous_BranchNormal // BGEZ
lui t3, $0402
beq t2, t3, :_Found_Previous_BranchLikely // BLTZL
lui t3, $0403
beq t2, t3, :_Found_Previous_BranchLikely // BGEZL
lui t3, $0410
beq t2, t3, :_Found_Previous_BranchAndLink // BLTZAL
lui t3, $0411
beq t2, t3, :_Found_Previous_BranchAndLink // BGEZAL
lui t3, $0412
beq t2, t3, :_Found_Previous_BranchAndLinkLikely // BLTZALL
lui t3, $0413
beq t2, t3, :_Found_Previous_BranchAndLinkLikely // BGEZALL
lui t3, $1800
beq t2, t3, :_Found_Previous_BranchNormal // BLEZ
lui t3, $1900
beq t2, t3, :_Found_Previous_BranchNormal // BGTZ
lui t3, $5800
beq t2, t3, :_Found_Previous_BranchLikely // BLEZL
lui t3, $5900
beq t2, t3, :_Found_Previous_BranchLikely // BGTZL
lui t0, $FC1F
ori t0, t0, $0EFF
and t2, t0, t1
ori t3, zero, $0009
beq t2, t3, :_Found_Previous_JALR
lui t0, $FFFF
and t2, t0, t1
lui t3, $4500
beq t2, t3, :_Found_Previous_BranchNormal // BC1F
lui t3, $4501
beq t2, t3, :_Found_Previous_BranchLikely // BC1FL
lui t3, $4502
beq t2, t3, :_Found_Previous_BranchNormal // BC1T
lui t3, $4503
beq t2, t3, :_Found_Previous_BranchLikely // BC1TL
nop
beq zero, zero, :_Check_Next_Op
addiu s0, s0, $0004
//----------------
_Found_Previous_JR:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0048 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
addiu s2, s2, $0004
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bne s5, zero, $ ///////
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_jr_Original
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_J:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0048 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t2_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_j_OriginalAddress
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//----------------
_Found_Previous_bgezal zero,:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0050 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_lui_ra_OriginalAddress
nop
bgezal zero, :_convert_jal_to_j_OriginalAddress
nop
bgezal zero, :_ori_ra_ra_OriginalAddress
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//----------------
_Found_Previous_JALR:
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0060 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_rd_0aaa
nop
bgezal zero, :_ori_rd_rd_aaaa
nop
bgezal zero, :_srl_t1_rs_2
nop
bgezal zero, :_lui_r2_0800
nop
bgezal zero, :_or_r1_r1_r2
nop
bgezal zero, :_sw_r1_0054(r0)
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchNormal:
// This covers BEQ, BNE, BGTZ, BLTZ, BGEZ, BLEZ, BC1F, and BC1T.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0058 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_branch_t1_t3_0003
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchLikely:
// This covers BEQL, BNEL, BGTZL, BLTZL, BGEZL, BLEZL, BC1TL, and BC1FL.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0058 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_branch_u0_u1_0003
nop
bgezal zero, :_Original_Load_Or_Store_Op
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchAndLink:
// This covers BLTZAL and BGEZAL.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $005C // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_Remove_Linking_From_Branches
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
sw zero, $0004(s0)
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Found_Previous_BranchAndLinkLikely:
// This covers BLTZALL and BGEZALL.
bgezal zero, :_Check_If_There_Is_Enough_Space
ori t0, zero, $0058 // The amount of lines it will take.
bgezal zero, :_addiu_sp_sp_FFC0
nop
bgezal zero, :_sq_t0_0000(sp)
nop
bgezal zero, :_sq_t1_0010(sp)
nop
bgezal zero, :_sq_t2_0020(sp)
nop
bgezal zero, :_sq_t3_0030(sp)
nop
bgezal zero, :_lui_t0_SubroutineArea
nop
bgezal zero, :_ori_t0_t0_SubroutineArea
nop
bgezal zero, :_lui_t1_TargetAddress
nop
bgezal zero, :_ori_t1_t1_TargetAddress
nop
bgezal zero, :_is_t2_needed
nop
bgezal zero, :_addiu_t3_NormallyUsedRegister_offset
nop
bgezal zero, :_beql_t1_t3_0001
nop
bgezal zero, :_sw_t1_0000(t0)
nop
bgezal zero, :_lq_t0_0000(sp)
nop
bgezal zero, :_lq_t1_0010(sp)
nop
bgezal zero, :_lq_t2_0020(sp)
nop
bgezal zero, :_lq_t3_0030(sp)
nop
bgezal zero, :_Remove_Linking_From_Branches
nop
bgezal zero, :_addiu_sp_sp_0040
nop
bgezal zero, :_j_destination1
nop
bgezal zero, :_j_destination2
nop
bgezal zero, :_Create_Jump_To_Subroutine
nop
beq zero, zero, :_Init_Find_Store_Or_Load_Ops
addiu s0, s0, $0008
//---------------
_Check_If_There_Is_Enough_Space:
addu t0, t0, s2
slt t0, t0, s3
beq t0, zero, :_Finished_Scanning // If there's no room left to create subroutines, it's done.
nop
jr ra
nop
//---------------
_addiu_sp_sp_FFC0:
lui t0, $27BD
ori t0, t0, $FFC0
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sq_t0_0000(sp):
lui t0, $7FA8
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_t0_SubroutineArea:
lui t0, $3c08
srl t2, s2, 16
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_t0_t0_SubroutineArea:
lui t0, $3508
andi t1, s2, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sq_t1_0010(sp):
lui t0, $7FA9
ori t0, t0, $0010
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_t1_TargetAddress:
lui t0, $3c09
srl t2, s4, 16
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_t1_t1_TargetAddress:
lui t0, $3529
andi t1, s4, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sq_t2_0020(sp):
lui t0, $7FAA
ori t0, t0, $0020
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_is_t2_needed:
// If it encounters registers t0, t1, t2, or t3 being used, this will be used to move their contents to t2.
lw t0, $0004(s0)
srl t0, t0, 21
andi t0, t0, $001F
lui t3, $7BAA
ori t1, zero, $0008
beq t0, t1, $000C
ori t2, t3, $0000 // Load t0's contents into t2
ori t1, zero, $0009
beq t0, t1, $0009
ori t2, t3, $0010 // Load t1's contents into t2
ori t1, zero, $000A
beq t0, t1, $0006
ori t2, t3, $0020 // Load t2's contents into t2
ori t1, zero, $000B
beq t0, t1, $0003
ori t2, t3, $0030 // Load t3's contents into t2
jr ra
nop
sw t2, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_addiu_t3_NormallyUsedRegister_offset:
lui t0, $240B
lw t1, $0000(s0)
lui t2, $03E0
and t3, t1, t2
lui t4, $0100
bne t3, t4, $0005
lui t4, $0120
bne t3, t4, $0003
lui t4, $0160
beql t3, t4, $0001
lui t3, $0140
and t0, t0, t3
andi t2, t1, $FFFF
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_branch_u0_u1_0003:
lw t0, $0000(s0)
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_Original_Load_Or_Store_Op:
lw t0, $0004(s0)
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_beql_t1_r0_0001:
lui t0, $5120
ori t0, t0, $0001
lw t1, $0000(s0)
lui t2, $03E0
and t3, t1, t2
lui t4, $0100
bne t3, t4, $0005
lui t4, $0120
bne t3, t4, $0003
lui t4, $0160
beql t3, t4, $0001
lui t3, $0140
srl t3, t3, 5
or t0, t0, t3
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sw_t1_0000(t0):
lui t0, $AD09
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t0_0000(sp):
lui t0, $7BA8
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t1_0010(sp):
lui t0, $7BA9
ori t0, t0, $0010
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t2_0020(sp):
lui t0, $7BAA
ori t0, t0, $0020
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lq_t3_0030(sp):
lui t0, $7BAB
ori t0, t0, $0030
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_addiu_sp_sp_0040:
lui t0, $27BD
ori t0, t0, $0040
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_jr_OriginalRegister:
lw t0, $0000(s0)
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_j_OriginalAddress:
lui t0, $0800
srl t2, s0, 2
or t0, t0, t2
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_ra_OriginalAddress:
lui t0, $3c1f
addiu t1, s0, $0008
srl t1, t1, 16
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_convert_jal_to_j_OriginalAddress:
lw t0, $0000(s0)
lui t1, $08FF
ori t1, t1, $FFFF
and t0, t0, t1 // Changes the JAL to a J.
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_ra_ra_OriginalAddress:
lui t0, $37FF
addiu t1, s0, $0008
andi t1, t1, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_rd_0aaa:
lw t0, $0000(s0)
srl t0, t0, 21
andi t0, t0, $001F
beql t0, zero, 0001
ori t0, t0, $001F
sll t0, t0, 16
lui t1, $3C00
or t0, t0, t1
addiu t1, s0, $0008
srl t1, t1, 16
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_ori_rd_rd_aaaa:
lw t0, $0000(s0)
srl t0, t0, 21
andi t0, t0, $001F
beql t0, zero, 0001
ori t0, t0, $001F
sll t0, t0, 16
sll t1, t0, 5
or t0, t0, t1
lui t1, $3400
or t0, t0, t1
addiu t1, s0, $0008
andi t1, t1, $FFFF
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_srl_t1_rs_2:
ori t0, zero, $4882
lw t1, $0000(s0)
andi t1, t1, $F800
sll t1, t1, 5
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_lui_r2_0800:
lui t0, $3C0A
ori t0, t0, $0800
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_or_t1_t1_t2:
lui t0, $012A
ori t0, t0, $4825
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_sw_t1_0054(t0):
lui t0, $AD09
ori t0, t0, $0054
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_branch_t1_t3_0003:
lw t0, $0000(s0)
srl t0, t0, 26
sll t0, t0, 26
ori t0, t0, $0003
lui t1, $012b
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_j_destination1:
addiu t0, s0, $0008
srl t0, t0, 2
lui t1, $0800
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_j_destination2:
srl t0, s0, 2
addiu t0, t0, $0001
lw t1, $0000(s0)
andi t1, t1, $FFFF
addiu t0, t0, t1
lw t1, $0800
or t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_Remove_Linking_From_Branches:
lui t1, $FFEF
ori t1, t1, $FFFF
and t0, t0, t1
sw t0, $0000(s2)
jr ra
addiu s2, s2, $0004
//----------------
_Create_Jump_To_Subroutine:
lui t0, $0800
srl t2, s2, 2
addiu t2, t2, $0001
or t0, t0, t2
jr ra
sw t0, $0000(s0)
//----------------
_Finished_Scanning:
lq ra, $0000(sp)
lq s0, $0010(sp)
lq s1, $0020(sp)
lq s2, $0030(sp)
lq s3, $0040(sp)
lq s4, $0050(sp)
lq s5, $0060(sp)
jr ra
addiu sp, sp, $0070
/*
lb = 80000000
lbu = 90000000
sb = a0000000
lh = 84000000
lhu = 94000000
sh = a4000000
lw = 8c000000
lwu = 9c000000
sw = ac000000
lwc1 = c4000000
swc1 = e4000000
lwc2 = c8000000
swc2 = e8000000
ld = dc000000
sd = fc000000
ldl = 68000000
sdl = b0000000
ldr = 6c000000
sdr = b4000000
ldc1 = d4000000
sdc1 = f4000000
lq = 78000000
sq = 7c000000
lqc2 = d8000000
sqc2 = f8000000
There's still a few more like these, like "prefetch" and "cache", but I'm not certain they are useful. I'll also need to alter this for doubles and quads since they have the possibility of missing addresses since they can use the next 12 bytes.
*/
/*
1 JR 000000 ????? 000000000000000 001000
1 JALR 000000 rs??? 00000 rd??? 00000 001001
1 BLTZ 000001 ????? 00000
1 BGEZ 000001 ????? 00001
1 BLTZL 000001 ????? 00010
1 BGEZL 000001 ????? 00011
1 BLTZAL 000001 ????? 10000
1 BGEZAL 000001 ????? 10001
1 BLTZALL 000001 ????? 10010
1 BGEZALL 000001 ????? 10011
1 BLEZ 000110 ????? 00000
1 BGTZ 000111 ????? 00000
1 BLEZL 010110 ????? 00000
1 BGTZL 010111 ????? 00000
1 J 000010
1 JAL 000011
1 BEQ 000100
1 BNE 000101
1 BEQL 010100
1 BNEL 010101
1 BC1F 010001 01000 00000
1 BC1T 010001 01000 00001
1 BC1FL 010001 01000 00010
1 BC1TL 010001 01000 00011
*/
Added "j" operations and some other load/store operations.
01-01-11: Completely rewrote some things in some kind of way that just makes life easier. Should work correctly for any instances of these 3:
"JR ??
Load/Store Op"
"J $0???????
Load/Store Op"
"JAL $0???????
Load/Store Op"
01-04-11: It should now work correctly for any instances of these 17:
"JALR ?? ??
Load/Store Op"
"BEQ ??, ??, $0???????
Load/Store Op"
"BNE ??, ??, $0???????
Load/Store Op"
"BLTZ ??, $0???????
Load/Store Op"
"BGTZ ??, $0???????
Load/Store Op"
"BLEZ ??, $0???????
Load/Store Op"
"BGEZ ??, $0???????
Load/Store Op"
"BEQL ??, ??, $0???????
Load/Store Op"
"BNEL ??, ??, $0???????
Load/Store Op"
"BLTZL ??, $0???????
Load/Store Op"
"BGTZL ??, $0???????
Load/Store Op"
"BLEZL ??, $0???????
Load/Store Op"
"BGEZL ??, $0???????
Load/Store Op"
"BLTZAL ??, $0???????
Load/Store Op"
"BGEZAL ??, $0???????
Load/Store Op"
"BLTZALL ??, $0???????
Load/Store Op"
"BGEZALL ??, $0???????
Load/Store Op"
That's all of the branches and jumps that would interfere with this and make it harder due to those delay slots or whatever they are called since I'm creating jumps. I just need to make it find single and multiple consecutive instances of Store/Load Ops, and check after them for the branches and jumps, and check after those for any other Store/Load Ops.
1-25-11: Added some stuff I started on for checking the next addresses' code for branches, jumps, other load/store operations, or just nothing.
2-18-11: More heavy updating to fix whatever stuff was wrong, incomplete, or not working the way I want it to. Changed many JALs to BGEZALs. I'm about to the point where I'm going to make it correctly check results that deal with doubles or vectors.
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