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According to the RAM mappings that has been on PS2dev.org for quit a long time, the mapped addresses are:
0x00100000-0x01ffffff RAM Mirror Address. (cached)
0x20100000-0x21ffffff RAM Mirror Adress. (not cached)
0x30100000-0x31ffffff RAM Mirror Adress. (not cached & accelerated)
I have noticed that if you write to the 0x00100000-0x01ffffff mirror, you have to wait for it to cache before it actually is accessible, which seems normal according to the information, but my question is about the 0x20100000-0x21ffffff and 0x30100000-0x31ffffff mirror addresses.
The information says that the 0x30100000-0x31ffffff is accelerated and not cached, I do not find this accurate. If you write to it, you still have to wait for it to cache, and seems to me that the 0x20100000-0x21ffffff is actually the accelerated one. The instant you write to it, the data is already able to be accessed. For instance, if you write an assembly function and have it copied to the 0x0 or 0x3 mirrors, you have to wait before you can Jump to it for it to execute other wise it just executes whatever was there before you made the copy. If you copy it to the 0x2 mirror, and Jump to it the instant the copy is complete it executes what you copied as if the mirror is accelerated to the other two mirrors before any cache is set.
My question is simply, am I correct that the 0x2 mirror is the accelerated one and the information provided was inaccurate? Or is there a reason behind this that I am not seeing at the moment?
0x00100000-0x01ffffff RAM Mirror Address. (cached)
0x20100000-0x21ffffff RAM Mirror Adress. (not cached)
0x30100000-0x31ffffff RAM Mirror Adress. (not cached & accelerated)
I have noticed that if you write to the 0x00100000-0x01ffffff mirror, you have to wait for it to cache before it actually is accessible, which seems normal according to the information, but my question is about the 0x20100000-0x21ffffff and 0x30100000-0x31ffffff mirror addresses.
The information says that the 0x30100000-0x31ffffff is accelerated and not cached, I do not find this accurate. If you write to it, you still have to wait for it to cache, and seems to me that the 0x20100000-0x21ffffff is actually the accelerated one. The instant you write to it, the data is already able to be accessed. For instance, if you write an assembly function and have it copied to the 0x0 or 0x3 mirrors, you have to wait before you can Jump to it for it to execute other wise it just executes whatever was there before you made the copy. If you copy it to the 0x2 mirror, and Jump to it the instant the copy is complete it executes what you copied as if the mirror is accelerated to the other two mirrors before any cache is set.
My question is simply, am I correct that the 0x2 mirror is the accelerated one and the information provided was inaccurate? Or is there a reason behind this that I am not seeing at the moment?